1. Field of the Invention
The present invention relates to an IC socket for electrically connecting a semiconductor device and a testing device for an electrical characteristic test of the semiconductor device. The IC socket of the present invention is, for example, used for the electrical characteristic test of the semiconductor device where plural external connection terminals are arranged in a single plane surface, such as BGA (Ball Grid Array) or CSP (Chip Size Package). More specifically, the IC chip of the present invention is useful for, for example, a wafer level CSP having an arrangement of fine external connection terminal.
2. Description of the Related Art
In a case where an electrical characteristic test of a semiconductor device where plural external connection terminals are arranged in a single plane surface, such as BGA (Ball Grid Array) or CSP (Chip Size Package), is implemented, an IC socket is generally used for electrically connecting the external connection terminal of the semiconductor device and an electrode of a testing device. A contact terminal is arranged at a position corresponding to the external connection terminal in the IC socket.
When the electrical characteristic test of the semiconductor device is implemented, the IC socket is mounted on a wiring substrate for testing such as a DUT (Device Under Test) board. The contact terminal is electrically connected to the testing device via the DUT board. A testing signal is supplied from the testing device to the semiconductor device via the DUT board and the contact terminal in a state where the semiconductor device is arranged at a designated position of the IC socket so that the external connection terminal of the semiconductor device and the contact terminal of the IC socket contact each other.
In order to accurately implement the electrical characteristic test of the semiconductor device, it is necessary to make the external connection terminal of the semiconductor device and the contact terminal of the IC socket accurately contact each other.
As a related art IC socket having a function for accurately contacting the external connection terminal and the contact terminal each other, a structure where a socket main body, a socket cover, and a substrate which is received in the socket main body and on which a semiconductor element (semiconductor device) is mounted, for example, are provided, is applied. See Japan Laid-Open Patent Application Publication No. 9-211067, for example. In this case, the socket main body includes a socket pin as the contact terminal. The socket pin is exposed to an internal bottom surface of the socket main body and pulled out to an outside of the socket main body via a bottom surface of the socket main body. The substrate includes a wiring layer electrically connecting the socket pin and an electrode of the semiconductor element, namely an external connection terminal. The substrate includes a wall part formed in a body so that the wall part comes in contact with two side of the semiconductor element. The socket body may include pressing means configured to contact two sides of the semiconductor element facing two sides of the socket main body for pressing.
In addition, another related art IC socket having the following structure is disclosed in Japan Laid-Open Patent Application Publication No. 5-249182, for example. In this IC socket, a plurality of probes (contact terminals) the front end sections of which are inserted into pinholes of a stylus guide plate for specifying the tip position of the probes (contact terminals) as contact electrodes and which are composed of thin wires having fixed intermediate sections and spring properties are fitted to positions corresponding to the electrodes (external connection terminals) of a semiconductor chip (semiconductor device) and the electrodes of the semiconductor chip are positioned at the tips of the probes by means of a chip guide. After positioning the electrodes, the semiconductor chip is pressed against the probes by means of a chip keeper. Since the front ends of the probes (contact terminals) having the spring properties protrude from the pinholes of the stylus guide plate and are accurately brought into contact with the electrodes of the semiconductor chip, the probes can be brought into electric contact with the semiconductor chip with high reliability.
In addition, an example of the wafer level CSP is disclosed. See Japan Laid-Open Patent Application Publication No. 2000-260190, for example. The wafer level CSP is a CSP wherein the external connection terminal is formed prior to application of a dicing process of the chip. For example, the wafer level CSP has an outside dimension of approximately 1 mm and a thickness of approximately 0.4 mm. The diameter of the external connection terminal is approximately 0.2 mm.
However, in a case where the external connection terminal having the pin-shaped configuration is used as disclosed in Japan Laid-Open Patent Application Publication No. 5-249182, the tip position of the external connection terminal is adjusted in the step for assembling the IC socket. The IC socket wherein adjusting the tip position of the contact terminal is completed is fixed to the DUT board and used for the electrical characteristic test of the semiconductor device.
A gap in the tip position of the contact terminal may be generated due to the use of the IC socket mounted on the DUT board. In this case, it is necessary to readjust the tip position of the contact terminal. However, there are processes for adjustment of the tip position of the contact terminal, such as removal of the IC socket from the DUT board, disassembly of the IC socket, adjustment of the tip position of the contact terminal, assembly of the IC socket, and mounting the IC socket on the DUT board. Hence, a large number of process and a large amount of time are necessary for the adjustment of the tip position of the contact terminal.